A NOVEL ERROR CORRECTING TECHNIQUE IN MLC NAND FLASH MEMORIES FOR DIGITAL APPLICATIONS

Author's Name: J.RAVIBABU & S.N. CHANDRASEKHAR
Subject Area: Science and Engineering
Subject Energy
Section Research Paper

Keyword:

BCH codes, Reed-Solomon, MLC NAND flash memories.


Abstract

In this paper product code based schemes are proposed to support higher error correction capability. Conventional reliable MLC NAND flash memories based on BCH codes or Reed-Solomon (RS) codes have a large number of undetectable and mis corrected errors. Moreover, standard decoders for BCH and RS codes cannot be easily modified to correct errors beyond their error correcting capability. Proposed product codes use Reed-Solomon (RS) codes along rows and Hamming codes along columns and have reduced hardware overhead. The proposed product codes can correct errors in multi level cell (MLC) NAND Flash memories with lower bit error rate (BER). MLC NAND flash memories can reduce the number of errors undetected for all code words to be almost 0 at the cost of less than 20% increase in power and area compared to architectures based on BCH codes and RS codes.

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